An inverter or the like for driving a motor of a vehicle is provided with a field effect transistor (FET) for switching a high voltage. In such an FET, when the resistance of a gate resistor is increased, a surge voltage generated in a turn-off period in which the FET transits from on to off is suppressed. However, because an increase in the resistance of the gate resistor also results in an extended length of the turn-off period, the switching speed drops, and the power loss is increased. By contrast, when the resistance of the gate resistor of the FET is reduced, the length of the turn-off period is reduced, and, as a result, the switching speed increases, and the power loss can be reduced. However, the surge voltage generated in the turn-off period becomes higher, and, as a result, problems such as an increased noise or a breakdown of the FET may occur.
To solve such problems, a technique for providing a switching control unit for switching a resistance of the gate resistor in the FET during a turn-off period has been known. For example, such a switching control unit decreases the resistance of the gate resistor during a period from when the switching is started to when the drain voltage reaches the power supply voltage, and brings up the resistance of the gate resistor after the drain voltage reaches the power supply voltage and a drain current starts flowing. In this manner, the power loss and the surge voltage of the FET are both suppressed.
Furthermore, the switching control unit may also switch the resistance of the gate resistor during a turn-on period in which a transition from the off state to the on state takes place, in the same manner as in the turn-off period. In this manner, the power loss and the current overshoot in the FET are both suppressed.
An appropriate resistance of the gate resistor differs depending on a target switching speed and a permissible surge voltage (or current overshoot). The appropriate resistance of the gate resistor also differs depending on a load current that is to be output from the FET to the load. Therefore, neither the power loss nor the surge voltage (or the current overshoot) of the FET can be suppressed unless the gate resistor is set to an appropriate resistance.
However, the target switching speed and the permissible surge voltage (or current overshoot) differ depending on the FET type and the circuit in which the FET is used. Furthermore, the load current that is output from the FET to the load varies depending on conditions of the load. Furthermore, the power supply voltage, the gate driving voltage, and the like also differ depending on the circuit in which the FET is used. Therefore, when the technology for switching the resistance of the gate resistor during a turn-off period or a turn-on period in the FET is used, it has been necessary to set the resistance of the gate resistor to an appropriate value using a simple structure, in a manner suitable for the FET type, circuit settings, ambient conditions surrounding the device, and the like.